The Hefei-based memory chip maker began mass producing 24 Gbit LPDDR5X products using a process that repeats manufacturing steps via quadruple patterning. This new platform reduces spacing between key structures in the chip's data-storage region to 11.95 nanometres to achieve finer circuit patterns. The resulting architecture allows for higher memory density than the company's previous generation of hardware.

The system generates at least 50% more gross dies per wafer than CXMT's fourth generation platform, based on an 8 gigabit chip. Joint research and development with domestic Chinese semiconductor-equipment manufacturers and the use of computer simulations enabled the current process advances.